S912XHZ512F1VAG Datasheet, PDF (893/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Appendix A Electrical Characteristics
greatest risk when the MCU is not consuming power; e.g., if no system clock is present, or if clock rate is
very low which would reduce overall power consumption.
A.1.5 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only. A functional operation under or outside those maxima
is not guaranteed. Stress beyond those limits may affect the reliability or cause permanent damage of the
device.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (e.g., either V_SS5 or V_DD5).
Table A-1. Absolute Maximum Ratings¹
Num
Rating
Symbol
Min
Max
Unit
1 I/O, regulator and analog supply voltage
2 Digital logic supply voltage²
3 PLL supply voltage²
4 Voltage difference V_DDX to V_DDR to V_DDM and V_DDA
5 Voltage difference V_SSX to V_SSR to V_SSM and V_SSA
6 Digital I/O input voltage
7 Analog reference
8 XFC, EXTAL, XTAL inputs
9 TEST input
10 Instantaneous maximum current
Single pin limit for all digital I/O pins except Port U, V and W³
V_DD5
V_DD
V_DDPLL
∆_VDDX
∆_VSSX
V_IN
V_RH, V_RL
V_ILV
V_TEST
I_D
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–25
6.0
V
3.0
V
3.0
V
0.3
V
0.3
V
6.0
V
6.0
V
3.0
V
10.0
V
+25
mA
10 Instantaneous maximum current
Single pin limit for Port U, V and W⁴
I_D
–55
+55
mA
11 Instantaneous maximum current
Single pin limit for XFC, EXTAL, XTAL⁵
I_DL
–25
+25
mA
12 Instantaneous maximum current
Single pin limit for TEST ⁶
I_DT
–0.25
0
mA
13 Storage temperature range
Tstg
–65
155
°C
1 _{Beyond absolute maximum ratings device might be damaged.}
2 _{The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The absolute}
maximum ratings apply when the device is powered from an external source.
3 _{All digital I/O pins are internally clamped to VSSX1/2 and VDDX1/2 or VSSA and VDDA.}
4 _{Ports U, V and W are internally clamped to VSSM1/2/3 and VDDM1/2/3.}
5 _{Those pins are internally clamped to VSSPLL and VDDPLL.}
6 _{This pin is clamped low to VSSPLL, but not clamped high. This pin must be tied low in applications.}
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
893