S912XHZ512F1VAG Datasheet, PDF (189/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 4 4 Kbyte EEPROM Module (S12XEETX4KV2)
START
no
Tbus < 1µs?
yes
PRDIV8 = 0 (reset)
ALL COMMANDS IMPOSSIBLE
oscillator_clock
no
>12.8 MHz?
yes
PRDIV8 = 1
PRDCLK = oscillator_clock/8
PRDCLK
=
oscillator_clock
PRDCLK[MHz]*(5+Tbus[µs]) ^no
an integer?
yes
EDIV[5:0]=INT(PRDCLK[MHz]*(5+Tbus[µs]))
EDIV[5:0]=PRDCLK[MHz]*(5+Tbus[µs])–1
TRY TO DECREASE Tbus EECLK = (PRDCLK)/(1+EDIV[5:0])
1/EECLK[MHz] + Tbus[ms] > 5 ^yes
AND
EECLK > 0.15 MHz
?
no
END
yes _{EDIV[5:0] > 4?}
no
ALL COMMANDS IMPOSSIBLE
Figure 4-17. Determination Procedure for PRDIV8 and EDIV Bits
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
189