S912XHZ512F1VAG Datasheet, PDF (148/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 3 512 Kbyte Flash Module (S12XFTX512K4V3)
The FCTL NV bits are loaded from the Flash nonvolatile byte located at global address 0x7F_FF0E during
the reset sequence, indicated by F in Figure 3-15.
Table 3-18. FCTL Field Descriptions
Field
6:0
NV[6:0]
Description
Nonvolatile Bits — The NV[6:0] bits are available as nonvolatile bits. Refer to the Device User Guide for proper
use of the NV bits.
3.3.2.9 Flash Address Registers (FADDR)
The FADDRHI and FADDRLO registers are the Flash address registers.
Module Base + 0x0008
7
6
5
4
3
2
1
0
R
FADDRHI
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-16. Flash Address High Register (FADDRHI)
Module Base + 0x0009
7
6
5
4
3
2
1
0
R
FADDRLO
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-17. Flash Address Low Register (FADDRLO)
All FADDRHI and FADDRLO bits are readable but are not writable. After an array write as part of a
command write sequence, the FADDR registers will contain the mapped MCU address written.
3.3.2.10 Flash Data Registers (FDATA)
The FDATAHI and FDATALO registers are the Flash data registers.
Module Base + 0x000A
7
6
5
4
3
2
1
0
R
FDATAHI
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-18. Flash Data High Register (FDATAHI)
MC9S12XHZ512 Data Sheet, Rev. 1.06
148
Freescale Semiconductor