S912XHZ512F1VAG Datasheet, PDF (149/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 3 512 Kbyte Flash Module (S12XFTX512K4V3)
Module Base + 0x000B
7
6
5
4
3
2
1
0
R
FDATALO
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-19. Flash Data Low Register (FDATALO)
All FDATAHI and FDATALO bits are readable but are not writable. At the completion of a data compress
operation, the resulting 16-bit signature is stored in the FDATA registers. The data compression signature
is readable in the FDATA registers until a new command write sequence is started.
3.3.2.11 RESERVED1
This register is reserved for factory testing and is not accessible.
Module Base + 0x000C
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-20. RESERVED1
All bits read 0 and are not writable.
3.3.2.12 RESERVED2
This register is reserved for factory testing and is not accessible.
Module Base + 0x000D
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-21. RESERVED2
All bits read 0 and are not writable.
3.3.2.13 RESERVED3
This register is reserved for factory testing and is not accessible.
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
149