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SH7729R Datasheet, PDF (90/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series | |||
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Addressing
Mode
PC-relative
Immediate
Instruction
Format Effective Address Calculation Method
disp:8
Effective address is PC with 8-bit displacement
disp added after being sign-extended and
multiplied by 2.
Calculation
Formula
PC + disp à 2
PC
disp
+
(sign-extended)
Ã
PC + disp à 2
disp:12
2
Effective address is PC with 12-bit displacement PC + disp à 2
disp added after being sign-extended and
multiplied by 2
PC
disp
+
(sign-extended)
Ã
PC + disp à 2
2
Rn
Effective address is sum of PC and Rn.
PC + Rn
PC
+
PC + Rn
#imm:8
#imm:8
#imm:8
Rn
8-bit immediate data imm of TST, AND, OR,
â
or XOR instruction is zero-extended.
8-bit immediate data imm of MOV, ADD, or
â
CMP/EQ instruction is sign-extended.
8-bit immediate data imm of TRAPA instruction â
is zero-extended and multiplied by 4.
Rev. 5.0, 09/03, page 44 of 806
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