SH7729R Datasheet, PDF (481/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

13.1.3 Pin Configuration
Table 13.1 shows the pin configuration of the TMU.
Table 13.1 TMU Pin
Channel
Clock input/clock output
Pin
I/O
TCLK I/O
Description
External clock input pin/input capture control input
pin/realtime clock (RTC) output pin
13.1.4 Register Configuration
Table 13.2 shows the TMU register configuration.
Table 13.2 TMU Registers
Channel Register
Abbre-
viation R/W
Common Timer output control
register
TOCR R/W
Timer start register
TSTR R/W
0
Timer constant register 0 TCOR0 R/W
Timer counter 0
TCNT0 R/W
Timer control register 0 TCR0 R/W
1
Timer constant register 1 TCOR1 R/W
Timer counter 1
TCNT1 R/W
Timer control register 1 TCR1 R/W
2
Timer constant register 2 TCOR2 R/W
Timer counter 2
TCNT2 R/W
Timer control register 2 TCR2 R/W
Input capture register 2 TCPR2 R
Note: * Initialized by power-on resets or manual resets.
Initial Value^* Address
H'00
H'FFFFFE90
H'00
H'FFFFFFFF
H'FFFFFFFF
H'0000
H'FFFFFFFF
H'FFFFFFFF
H'0000
H'FFFFFFFF
H'FFFFFFFF
H'0000
Undefined
H'FFFFFE92
H'FFFFFE94
H'FFFFFE98
H'FFFFFE9C
H'FFFFFEA0
H'FFFFFEA4
H'FFFFFEA8
H'FFFFFEAC
H'FFFFFEB0
H'FFFFFEB4
H'FFFFFEB8
Access
Size
8
8
32
32
16
32
32
16
32
32
16
32
Rev. 5.0, 09/03, page 435 of 806