SH7729R Datasheet, PDF (283/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

9.5 Module Standby Function
9.5.1 Transition to Module Standby Function
Setting the standby control register MSTP9–MSTP0 bits to 1 halts the supply of clocks to the
corresponding on-chip peripheral modules. This function can be used to reduce the power
consumption in sleep mode. The module standby function holds the state prior to halting the
external pins of the on-chip peripheral modules. TMU external pins hold their state prior to the
halt. SCI external pins go to the reset state. With a few exceptions, all registers hold their values.
Bit
Value
Description
MSTP9
0
X/Y memory runs
1
Supply of clock to X/Y memory halted
MSTP8
0
UBC runs
1
Supply of clock to UBC halted
MSTP7
0
DMAC runs
1
Supply of clock to DMAC halted
MSTP6
0
DAC runs
1
Supply of clock to DAC halted
MSTP5
0
ADC runs
1
Supply of clock to ADC halted, and all registers initialized
MSTP4
0
SCIF runs
1
Supply of clock to SCIF halted
MSTP3
0
IrDA runs
1
Supply of clock to IrDA halted
MSTP2
0
1
TMU runs
Supply of clock to TMU halted. Registers initialized^*1
MSTP1
0
1
RTC runs
Supply of clock to RTC halted. Register access prohibited^*2*3
MSTP0
0
SCI runs
1
Supply of clock to SCI halted
Notes: 1. The registers initialized are the same as in standby mode (see table 9.4).
2. The counter runs.
3. Before putting the RTC into module standby status, first access one or more o f the
RTC, SCI, and TMU registers. The RTC may then be put into module standby status.
9.5.2 Clearing Module Standby Function
The module standby function can be cleared by clearing the MSTP9–MSTP0 bits to 0, or by a
power-on reset or manual reset.
Rev. 5.0, 09/03, page 237 of 806