SH7729R Datasheet, PDF (125/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

2.6.4 DSP Operation Instruction Set
DSP operation instructions are instructions for digital signal processing performed by the DSP
unit. These instructions have a 32-bit instruction code, and multiple instructions can be executed
in parallel. The instruction code is divided into an A field and B field; a double data transfer
instruction is specified in the A field, and a single or double data operation instruction in the B
field. Instructions can be specified independently, and are also executed independently. The
function of the A field—that is, the data transfer instruction field—is basically the same as in the
double data transfer instructions described in section 2.6.3, Single and Double Data Transfer for
DSP Data Instructions, but has a special function in load instructions.
B-field data operation instructions are of three kinds: double data operation instructions,
conditional single data operation instructions, and unconditional single data operation instructions.
The formats of the DSP operation instructions are shown in table 2.30. The respective operands
are selected independently from the DSP registers. The correspondence between DSP operation
instruction operands and registers is shown in table 2.31.
Table 2.30 DSP Operation Instruction Formats
Type
Instruction Formats
Instructions
Double data operation instructions
ALUop. Sx, Sy, Du PADD PMULS,
(6 operands)
MLTop. Se, Sf, Dg PSUB PMULS
Conditional single 3 operands
ALUop. Sx, Sy, Dz PADD, PAND, POR, PSHA,
data operation
instructions
DCT ALUop. Sx, Sy, Dz PSHL, PSUB, PXOR
DCF ALUop. Sx, Sy, Dz
2 operands
ALUop. Sx, Dz
DCT ALUop. Sx, Dz
PCOPY, PDEC, PDMSB,
PINC,PLDS, PSTS, PNEG
DCF ALUop. Sx, Dz
ALUop. Sy, Dz
DCT ALUop. Sy, Dz
DCF ALUop. Sy, Dz
1 operand
ALUop. Dz
PCLR
DCT ALUop. Dz
DCF ALUop. Dz
Unconditional single 3 operands
data operation
instructions
2 operands
ALUop. Sx, Sy, Du PADDC, PSUBC, PMULS
MLTop. Se, Sf, Dg
ALUop. Sx, Dz
PCMP, PABS, PRND
ALUop. Sy, Dz
ALUop. Sx, Sy
1 operand
ALUop. Dz
PSHA #imm, PSHL #imm
Rev. 5.0, 09/03, page 79 of 806