SH7729R Datasheet, PDF (322/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table 11.3 Physical Address Space Map
Area
0
Connectable Memory
Ordinary memory^*1,
burst ROM
1
Internal I/O registers^*7
Physical Address
H'00000000 to H'03FFFFFF
H'00000000 + H'20000000 × n to
H'03FFFFFF + H'20000000 × n
H'04000000 to H'07FFFFFF
Capacity
64 Mbytes
Shadow
64 Mbytes
Access Size
8, 16, 32^*2
n = 1–6
8, 16, 32^*3
2
Ordinary memory^*1,
synchronous DRAM
3
Ordinary memory,
synchronous DRAM
4
Ordinary memory
H'04000000 + H'20000000 × n to
H'07FFFFFF + H'20000000 × n
H'08000000 to H'0BFFFFFF
H'08000000 + H'20000000 × n to
H'0BFFFFFF + H'20000000 × n
H'0C000000 to H'0FFFFFFF
H'0C000000 + H'20000000 × n to
H'0FFFFFFF + H'20000000 × n
H'10000000 to H'13FFFFFF
Shadow
64 Mbytes
Shadow
64 Mbytes
Shadow
64 Mbytes
n = 1–6
8, 16, 32^{*3 *4}
n = 1–6
8, 16, 32^{*3 *4}
n = 1–6
8, 16, 32^*3
H'10000000 + H'20000000 × n to Shadow
H'13FFFFFF + H'20000000 × n
n = 1–6
5
Ordinary memory,
H'14000000 to H'15FFFFFF
32 Mbytes 8, 16, 32 ^{*3 *5}
PCMCIA, burst ROM
Ordinary memory, burst
ROM
H'16000000 to H'17FFFFFF
H'14000000 + H'20000000 × n to
H'17FFFFFF + H'20000000 × n
32 Mbytes
Shadow
n = 1–6
6
Ordinary memory,
PCMCIA, burst ROM
H'18000000 to H'19FFFFFF
H'1A000000 to H'1BFFFFFF
32 Mbytes 8, 16, 32 ^{*3 *5}
7^*6 Reserved area
H'18000000 + H'20000000 × n to
H'1BFFFFFF + H'20000000 × n
H'1C000000 + H'20000000 × n
to H'1FFFFFFF + H'20000000 × n
Shadow
n = 1–6
n = 0–7
Notes: 1. Memory with interface such as SRAM or ROM.
2. Use external pin to specify memory bus width.
3. Use register to specify memory bus width.
4. With synchronous DRAM interfaces, bus width must be 16 or 32 bits.
5. With PCMCIA interface, bus width must be 8 or 16 bits.
6. Do not access the reserved area. If the reserved area is accessed, correct operation
cannot be guaranteed.
7. When the control register in area 1 is not used for address translation by the MMU, set
the first three bits of the logical address to 101 for allocation to the P2 space.
Rev. 5.0, 09/03, page 276 of 806