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| SH7729R Datasheet, PDF (790/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series | |||
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Tpcm1 Tpcm2 Tpcm1 Tpcm2 Tpcm1 Tpcm2 Tpcm1 Tpcm2
CKIO
tAD
tAD
A25 to A4
A3 to A0
CExx
RD/WR
RD
(read)
tAD
tCSD1
tRWD
tRSD
tAD
tRSD tRSD
tRDH1
tAD
tRSD
tRDH1
tAD
tCSD1
tRWD
D15 to D0
(read)
BS
DACKn
tRDS1
tBSD
tBSD
tDAKD1
tRDS1
tBSD
tBSD
tDAKD1
Note: Even though burst mode is set, the write cycle operation is the same as in normal mode.
Figure 24.42 PCMCIA Memory Bus Cycle
(Burst Read, TED = 0, TEH = 0, No Wait)
Rev. 5.0, 09/03, page 744 of 806
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