SH7729R Datasheet, PDF (731/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Section 23 User Debugging Interface (UDI)
23.1 Overview
The SH7729R incorporates a user debugging interface (UDI) and advanced user debugger (AUD)
for program debugging.
23.2 User Debugging Interface (UDI)
The UDI (user debugging interface) performs on-chip debugging which is supported by the
SH7729R. The UDI described here is a serial interface which is compatible with JTAG (Joint Test
Action Group, IEEE Standard 1149.1 and IEEE Standard Test Access Port and Boundary-Scan
Architecture) specifications.
The UDI in the SH7729R supports a boundary scan mode, and is also used for emulator
connection.
When using an emulator, UDI functions should not be used. Refer to the emulator manual for the
method of connecting the emulator.
23.2.1 Pin Descriptions
TCK: UDI serial data input/output clock pin. Data is serially supplied to the UDI from the data
input pin (TDI), and output from the data output pin (TDO), in synchronization with this clock.
TMS: Mode select input pin. The state of the TAP control circuit is determined by changing this
signal in synchronization with TCK. The protocol complies with the JTAG standard (IEEE Std.
1149.1).
TRST: UDI reset input pin. Input is accepted asynchronously with respect to TCK, and when low,
the UDI is reset. See section 23.4.2, Reset Configuration, for more information.
TDI: UDI serial data input pin. Data transfer to the UDI is executed by changing this signal in
synchronization with TCK.
TDO: UDI serial data output pin. Data output from the UDI is executed by reading this signal in
synchronization with TCK.
ASEMD0: ASE mode select pin. If a low level is input at the ASEMD0 pin while the RESETP
pin is asserted, ASE mode is entered; if a high level is input, normal mode is entered. In ASE
mode, boundary scan and emulator functions can be used. The input level at the ASEMD0 pin
should be held for at least one cycle after RESETP negation.
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