SH7729R Datasheet, PDF (285/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Manual Reset
CKIO, CKIO2^*5
RESETM
STATUS
Normal^*3
Reset^*2
Normal^*3
RESETOUT
0 Bcyc or more^{*1 *4}
0 to 30 Bcyc^*4
Notes: 1. In a manual reset, STATUS becomes HH (reset) and the internal reset begins
after waiting for the executing bus cycle to end.
2. Reset: HH (STATUS1 high, STATUS0 high)
3. Normal: LL (STATUS1 low, STATUS0 low)
4. Bcyc: Bus clock cycle
5. CKIO2 output can only be used in clock modes 0, 1, and 2.
Figure 9.3 Manual Reset STATUS Output
Rev. 5.0, 09/03, page 239 of 806