SH7729R Datasheet, PDF (776/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

CKIO
A25 to A16
A12 or A10
A15 to A0
CSn
RD/WR
RAS
CAS
DQMxx
D31 to D0
BS
Tr
Tc1
Tc2
Tc3
Tc4
(Trwl)
(Tpc)
(Tpc)
tAD
tAD
Row address
tAD
tAD
tAD
tAD
Row
address
tAD
tAD
Write command
Write A
command
tAD
Row
address
tCSD3
Column address (1-4)
tCSD3
tRWD tRWD
tRWD
tRASD2 tRASD2
tCASD2
tCASD2
tDQMD
tDQMD
tWDD2 tWDD2
tWDH2
tBSD
tBSD
CKE
DACKn
tDAKD1
(High)
tDAKD1
Figure 24.28 Synchronous DRAM Write Bus Cycle (Burst Write (Single Write × 4),
RCD = 0, TPC = 1, TRWL = 0)
Rev. 5.0, 09/03, page 730 of 806