SH7729R Datasheet, PDF (100/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Double and Single Data Transfer Instructions: The format of double data transfer instructions
is shown in table 2.15, and that of single data transfer instructions in table 2.16.
Table 2.15 Double Data Transfer Instruction Formats
Type
Mnemonic
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
X memory NOPX
1111000
0
0
data
transfer
MOVX.W @Ax,Dx
MOVX.W @Ax+,Dx
Ax Dx
0
00
01
10
MOVX.W @Ax+Ix,Dx
11
MOVX.W Da,@Ax
Da
1
01
MOVX.W Da,@Ax+
10
MOVX.W Da,@Ax+Ix
11
Y memory NOPY
111100
0
0
0
data
transfer
MOVY.W @Ay,Dy
MOVY.W @Ay+,Dy
Ay Dy
0
00
01
10
MOVY.W @Ay+Iy,Dy
11
MOVY.W Da,@Ay
Da
1
01
MOVY.W Da,@Ay+
10
MOVY.W Da,@Ay+Iy
11
Note:
Ax: 0 = R4, 1 = R5
Ay: 0 = R6, 1 = R7
Dx: 0 = X0, 1 = X1
Dy: 0 = Y0, 1 = Y1
Da: 0 = A0, 1 = A1
Rev. 5.0, 09/03, page 54 of 806