SH7729R Datasheet, PDF (628/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table 17.8 SCSCR Settings and SCIF Clock Source Selection
SCSCR Settings
Mode
Bit 1
CKE1
Bit 0
CKE0
Asynchronous 0
0
mode
1
1
0
1
SCIF Transmit/Receive Clock
Clock Source
Internal
External
SCK Pin Function
SCIF does not use the SCK pin
Outputs a clock with a frequency 16 times
the bit rate
Inputs a clock with frequency 16 times the
bit rate
17.3.2 Serial Operation
Transmit/Receive Formats: Table 17.9 lists the eight communication formats that can be
selected. The format is selected by settings in the serial mode register (SCSMR).
Table 17.9 Serial Communication Formats
SCSMR Bits
CHR PE STOP
Serial Transmit/Receive Format and Frame Length
1 2345678 9
10 11 12
0
0
0
START
8-bit data
STOP
0
0
1
START
8-bit data
STOP STOP
0
1
0
START
8-bit data
P STOP
0
1
1
START
8-bit data
P STOP STOP
1
0
0
START
7-bit data
STOP
1
0
1
START
7-bit data
STOP STOP
1
1
0
START
7-bit data
P STOP
1
1
1
START: Start bit
STOP: Stop bit
P:
Parity bit
START
7-bit data
P STOP STOP
Rev. 5.0, 09/03, page 582 of 806