SH7729R Datasheet, PDF (121/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Instruction
LDC.L @Rn+,RE
LDS Rn,DSR
LDS Rn,A0
LDS Rn,X0
LDS Rn,X1
LDS Rn,Y0
LDS Rn,Y1
LDC Rn,MOD
LDC Rn,RS
LDC Rn,RE
Instruction Code
Operation
0100nnnn01110111 (Rn) → RE, Rn + 4 → Rn
0100nnnn01101010 Rn → DSR
0100nnnn01111010 Rn → A0
0100nnnn10001010 Rn → X0
0100nnnn10011010 Rn → X1
0100nnnn10101010 Rn → Y0
0100nnnn10111010 Rn → Y1
0100nnnn01011110 Rn → MOD
0100nnnn01101110 Rn → RS
0100nnnn01111110 Rn → RE
Execu-
tion
States
5
1
1
1
1
1
1
3
3
3
T Bit
—
—
—
—
—
—
—
—
—
—
2.6.3 Single and Double Data Transfer for DSP Data Instructions
The instructions in this class are provided to reduce the program code size for DSP operations. All
the new instructions in this class have a 16-bit code length. Instructions in this class are divided
into two groups: single data transfer instructions and double data transfer instructions. The
operand flexibility of the double data transfer instructions is the same as with the A field in
parallel instruction class data transfer instructions described in section 2.6.4, DSP Operation
Instruction Set. However, conditional load instructions cannot be used with these 16-bit
instructions. In single transfer, the Ax pointer and two address pointers (R2 and R3) are used as
the As pointer, but the Ay pointer is not used. Tables 2.27 and 2.28 list the single and double data
transfer instructions.
With double data transfer group instructions, X memory and Y memory can be accessed in
parallel. The Ax pointer can only be used by X memory access instructions, and the Ay pointer
only by Y memory access instructions. Double data transfer instructions can only access the on-
chip X and Y memory areas. Single data transfer instructions use a 16-bit instruction code, and can
access any memory address space.
Rn (n = 2 to 7) registers are normally used as the Ax, Ay, and As pointers. The pointer names
themselves can be changed with the assembler rename function. The following renaming scheme
is recommended.
R2:As2, R3:As3, R4:Ax0 (As0), R5:Ax1 (As1), R6:Ay0, R7:Ay1, R8:Ix(Is), R9:Iy
Rev. 5.0, 09/03, page 75 of 806