SH7729R Datasheet, PDF (570/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Start of reception
Read ORER bit in SCSSR
Yes
ORER = 1?
No
Read RDRF bit in SCSSR
(2)
(1)
Error handling
No
RDRF = 1?
Yes
Read receive data from SCRDR
and clear RDRF bit in SCSSR to 0 ⁽³⁾
No
All data received?
Yes
Clear RE bit in SCSCR to 0
End of reception
Note: Numbers in parentheses refer to steps in the preceding procedure description.
Figure 15.21 Sample Flowchart for Receiving Serial Data
Rev. 5.0, 09/03, page 524 of 806