SH7729R Datasheet, PDF (302/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Cautions:
1. The input to divider 1 becomes the output of PLL circuit 1 when PLL circuit 1 is on.
2. The input of divider 2 becomes the output of PLL circuit 1.
3. The frequency of the internal clock (Iφ) becomes:
• The product of the frequency of the CKIO pin, the frequency multiplication ratio of PLL
circuit 1, and the division ratio of divider 1 when PLL circuit 1 is on.
• Do not set the internal clock frequency lower than the CKIO pin frequency.
Rev. 5.0, 09/03, page 256 of 806