SH7729R Datasheet, PDF (7/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Preface
The SH7729R is a microprocessor that integrates peripheral functions necessary for system
configuration with a 32-bit internal architecture SH2-DSP CPU as its core.
The SH7729R's on-chip peripheral functions include a cache memory, internal X/Y memory, an
interrupt controller, timers, three serial communication interfaces, a real time clock (RTC),
memory management unit (MMU), a user break controller (UBC), a bus state controller (BSC),
and I/O ports, making it ideal for use as a microcomputer in electronic devices that require high
speed together with low power consumption.
Intended Readership: This manual is intended for users undertaking the design of an application
system using the SH7729R. Readers using this manual require a basic
knowledge of electrical circuits, logic circuits, and microcomputers.
Purpose:
The purpose of this manual is to give users an understanding of the hardware
functions and electrical characteristics of the SH7729R. Details of execution
instructions can be found in the SH-3, SH-3E, SH3-DSP Programming
Manual, which should be read in conjunction with the present manual.
Using this Manual:
• For an overall understanding of the SH7729R's functions
Follow the Table of Contents. This manual is broadly divided into sections on the CPU, system
control functions, peripheral functions, and electrical characteristics.
• For a detailed understanding of CPU functions
Refer to the separate publication SH-3, SH-3E, SH3-DSP Programming Manual.
Note on bit notation: Bits are shown in high-to-low order from left to right.
Related Material: The latest information is available at our Web Site. Please make sure that you
have the most up-to-date information available.
(http://www.renesas.com/eng/)
Rev. 5.0, 09/03, page vii of xlvi