SH7729R Datasheet, PDF (89/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Addressing
Mode
Indexed GBR
indirect
Instruction
Format Effective Address Calculation Method
@(R0,
GBR)
Effective address is sum of register GBR and
R0 contents.
GBR
+
GBR + R0
Calculation
Formula
GBR + R0
R0
PC-relative with @(disp:8,
displacement PC)
Effective address is PC with 8-bit displacement Word: PC + disp
disp added. After disp is zero-extended, it is
×2
multiplied by 2 (word) or 4 (longword), according _Longword:
to the operand size. With a longword operand, _{PC&H'FFFFFFFC}
the lower 2 bits of PC are masked.
+ disp × 4
PC
&^*
H'FFFFFFFC
+
disp
(zero-extended)
×
PC + disp × 2
or
PC&H'FFFFFFFC
+ disp × 4
2/4
*^{: With longword operand}
Rev. 5.0, 09/03, page 43 of 806