SH7729R Datasheet, PDF (534/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

SCPCR Bits 3 and 2—Serial Clock Port I/O (SCP1MD1, SCP1MD0): Specify serial port SCK
pin I/O. When the SCK pin is actually used as a port I/O pin, clear the C/A bit in SCSMR and bits
CKE1 and CKE0 in SCSCR to 0.
Bit 3:
SCP1MD1
0
0
1
1
Bit 2:
SCP1MD0
0
1
0
1
Description
SCP1DT bit value is not output to SCK pin
SCP1DT bit value is output to SCK pin
SCK pin value is read from SCP1DT bit
(Initial values: 1 and 0)
SCPDR Bit 1—Serial Clock Port Data (SCP1DT): Specifies the serial port SCK pin I/O data.
Input or output is specified by the SCP1MD0 and SCP1MD1 bits. In output mode, the value of
the SCP1DT bit is output to the SCK pin. In output mode, the SCK pin value is read from the
SCP1DT bit.
Bit 1:
SCP1DT
0
1
Description
I/O data is low
I/O data is high
(Initial value)
SCPCR Bits 1 and 0—Serial Port Break I/O (SCP0MD1, SCP0MD0): Specify the serial port
TxD pin output condition. When the TxD pin is actually used as a port output pin and outputs the
value set with the SCP0DT bit, clear the TE bit in SCSCR to 0.
Bit 1:
SCP0MD1
0
0
Bit 0:
SCP0MD0
0
1
Description
SCP0DT bit value is not output to TxD pin
SCP0DT bit value is output to TxD pin
(Initial value)
Rev. 5.0, 09/03, page 488 of 806