SH7729R Datasheet, PDF (226/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

7.3.4 Interrupt Control Register 2 (ICR2)
ICR2 is a 16-bit readable/writable register that sets the detection mode for external interrupt input
pins PINT0 to PINT15. This register is initialized to H'0000 by a power-on reset or manual reset,
but is not initialized in standby mode.
Bit: 15
14
13
12
11
10
9
8
PINT15S PINT14S PINT13S PINT14S PINT11S PINT10S PINT9S PINT8S
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PINT7S PINT6S PINT5S PINT4S PINT3S PINT2S PINT1S PINT0S
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bits 15 to 0—PINT15 to PINT0 Sense Select (PINT15S to PINT0S): Select whether interrupt
request signals to PINT15 to PINT0 are detected at the low level or high level.
Bits 15–0:
PINT15S to PINT0S
0
1
Description
Interrupt requests are detected at low level input to the PINT pin
(Initial value)
Interrupt requests are detected at high level input to the PINT pin
Rev. 5.0, 09/03, page 180 of 806