SH7729R Datasheet, PDF (27/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

14.2.9 Second Alarm Register (RSECAR)...................................................................... 459
14.2.10 Minute Alarm Register (RMINAR) ..................................................................... 460
14.2.11 Hour Alarm Register (RHRAR) ........................................................................... 460
14.2.12 Day of Week Alarm Register (RWKAR)............................................................. 461
14.2.13 Date Alarm Register (RDAYAR) ........................................................................ 462
14.2.14 Month Alarm Register (RMONAR)..................................................................... 462
14.2.15 RTC Control Register 1 (RCR1) .......................................................................... 463
14.2.16 RTC Control Register 2 (RCR2) .......................................................................... 464
14.3 RTC Operation .................................................................................................................. 466
14.3.1 Initial Settings of Registers after Power-On......................................................... 466
14.3.2 Setting the Time ................................................................................................... 466
14.3.3 Reading the Time ................................................................................................. 467
14.3.4 Alarm Function .................................................................................................... 468
14.3.5 Crystal Oscillator Circuit...................................................................................... 469
14.4 Usage Notes....................................................................................................................... 470
14.4.1 Register Writing during RTC Count .................................................................... 470
14.4.2 Use of Realtime Clock (RTC) Periodic Interrupts ............................................... 470
14.4.3 Precautions when Using RTC Module Standby ................................................... 470
Section 15 Serial Communication Interface (SCI)..................................................... 471
15.1 Overview ........................................................................................................................... 471
15.1.1 Features ................................................................................................................ 471
15.1.2 Block Diagram ..................................................................................................... 472
15.1.3 Pin Configuration ................................................................................................. 475
15.1.4 Register Configuration ......................................................................................... 476
15.2 Register Descriptions......................................................................................................... 476
15.2.1 Receive Shift Register (SCRSR) .......................................................................... 476
15.2.2 Receive Data Register (SCRDR).......................................................................... 477
15.2.3 Transmit Shift Register (SCTSR)......................................................................... 477
15.2.4 Transmit Data Register (SCTDR) ........................................................................ 478
15.2.5 Serial Mode Register (SCSMR) ........................................................................... 478
15.2.6 Serial Control Register (SCSCR) ......................................................................... 481
15.2.7 Serial Status Register (SCSSR) ............................................................................ 484
15.2.8 SC Port Control Register (SCPCR)/SC Port Data Register (SCPDR) ................. 487
15.2.9 Bit Rate Register (SCBRR) .................................................................................. 489
15.3 Operation........................................................................................................................... 497
15.3.1 Overview .............................................................................................................. 497
15.3.2 Operation in Asynchronous Mode........................................................................ 499
15.3.3 Multiprocessor Communication ........................................................................... 509
15.3.4 Synchronous Operation ........................................................................................ 518
15.4 SCI Interrupts .................................................................................................................... 528
15.5 Usage Notes....................................................................................................................... 529
Rev. 5.0, 09/03, page xxvii of xlvi