SH7729R Datasheet, PDF (124/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

The correspondence between DSP data transfer operands and registers is shown in table 2.29.
CPU core registers are used as a pointer address that indicates a memory address.
Table 2.29 Correspondence between DSP Data Transfer Operands and Registers
Register
CPU
R0
register _R1
R2 (As2)
R3 (As3)
R4 (Ax0, As0)
R5 (Ax1, As1)
R6 (Ay0)
R7 (Ay1)
R8 (Ix, Is)
R9 (Iy)
DSP
A0
register _A1
M0
M1
X0
X1
Y0
Y1
A0G
A1G
Ax Ix Dx Ay Iy Dy Da As Is Ds
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Rev. 5.0, 09/03, page 78 of 806