SH7729R Datasheet, PDF (274/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table 9.1 Power-Down Modes
State
Mode
Transition
Conditions
CPG
CPU
CPU
On-Chip
Reg- On-Chip Peripheral
External Canceling
ister Memory Modules Pins Memory Procedure
Sleep
mode
Standby
mode
Module
standby
function
Execute SLEEP
instruction with
STBY bit cleared
to 0 in STBCR
Runs
Execute SLEEP
instruction with
STBY bit set to
1 in STBCR
Halts
Set MSTP bit to Runs
1 in STBCR
Halts
(Reg-
ister:
held)
Held
Halts
(Reg-
ister:
held)
Held
Runs Held
or halts
Held
Held
Held
Hardware Drive CA pin low Halts
standby
mode
Halts
Held
Held
Run
Held Refresh 1. Interrupt
2. Reset
Halt^*1
Held Self-
refresh
1. Interrupt
2. Reset
Specified
module
halts
Halt^*3
*²
Refresh
Held Self-
refresh
1. Clear MSTP
bit to 0
2. Reset
Power-on
reset
Notes: 1. The RTC still runs if the START bit in RCR2 is set to 1 (see section 14, Realtime Clock
(RTC)). The TMU still runs when output of the RTC is used as input to its counter (see
section 13, Timer (TMU)).
2. Depends on the on-chip peripheral module.
TMU external pin: Held
SCI external pin: Reset
3. The RTC still runs if the START bit in RCR2 is set to 1. The TMU does not run.
Rev. 5.0, 09/03, page 228 of 806