SH7729R Datasheet, PDF (356/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table 11.12 8-Bit External Device/Little-Endian Access and Data Alignment
Operation
Byte access at 0
D31–
D24
—
Byte access at 1
—
Byte access at 2
—
Byte access at 3
—
Word access 1st time —
at 0
at 0
2nd time —
at 1
Word access 1st time —
at 2
at 2
2nd time —
at 3
Longword 1st time —
access at 0 at 0
2nd time —
at 1
3rd time —
at 2
4th time —
at 3
Data Bus
D23– D15–
D16 D8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
WE3,
D7–D0 DQMUU
Data
7–0
Data
7–0
Data
7–0
Data
7–0
Data
7–0
Data
15–8
Data
7–0
Data
15–8
Data
7–0
Data
15–8
Data
23–16
Data
31–24
Strobe Signals
WE2,
WE1,
DQMUL DQMLU
WE0,
DQMLL
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Rev. 5.0, 09/03, page 310 of 806