SH7729R Datasheet, PDF (618/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table 17.4 lists examples of SCBRR settings.
Table 17.4 Bit Rates and SCBRR Settings
Bit Rate (bits/s) n
110
1
150
1
300
0
600
0
1200
0
2400
0
4800
0
9600
0
19200
0
31250
0
38400
0
2
N
Error (%) n
141 0.03
1
103 0.16
1
207 0.16
0
103 0.16
0
51
0.16
0
25
0.16
0
12
0.16
0
6
–6.99 0
2
8.51
0
1
0.00
0
1
–18.62 0
Pφ (MHz)
2.097152
N
Error (%) n
148 –0.04 1
108 0.21
1
217 0.21
0
108 0.21
0
54
–0.70 0
26
1.14
0
13
–2.48 0
6
–2.48 0
2
13.78 0
1
4.86
0
0
–14.67 0
2.4576
N
Error (%)
174 –0.26
127 0.00
255 0.00
127 0.00
63 0.00
31 0.00
15 0.00
7
0.00
3
0.00
1
22.88
1
0.00
Bit Rate (bits/s) n
110
1
150
1
300
1
600
0
1200
0
2400
0
4800
0
9600
0
19200
0
31250
0
38400
—
3
N
Error (%) n
212 0.03
2
155 0.16
1
77
0.16
1
155 0.16
0
77
0.16
0
38
0.16
0
19
–2.34 0
9
–2.34 0
4
–2.34 0
2
0.00
0
—
—
0
Pφ (MHz)
3.6864
N
Error (%) n
64
0.70
2
191 0.00
1
95
0.00
1
191 0.00
0
95
0.00
0
47
0.00
0
23
0.00
0
11
0.00
0
5
0.00
0
3
–7.84 0
2
0.00
0
4
N
Error (%)
70 0.03
207 0.16
103 0.16
207 0.16
103 0.16
51 0.16
25 0.16
12 0.16
6
–6.99
3
0.00
2
8.51
Rev. 5.0, 09/03, page 572 of 806