SH7729R Datasheet, PDF (734/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table 23.2 UDI Commands
TI3
TI2
TI1
TI0
Description
0
0
0
0
EXTEST
0
1
0
0
SAMPLE/PRELOAD
0
1
0
1
Reserved
0
1
1
0
UDI reset negate
0
1
1
1
UDI reset assert
1
0
0
—
Reserved
1
0
1
—
UDI interrupt
1
1
0
—
Reserved
1
1
1
0
Reserved
1
1
1
1
Bypass mode
(Initial value)
0
0
0
1
Recovery from sleep
Bits 11 to 0—Reserved: These bits are always read as 1.
23.3.3 Boundary Scan Register (SDBSR)
The boundary scan register (SDBSR) is a shift register, located on the PAD, for controlling the
input/output pins of the SH7729R.
Using the EXTEST and SAMPLE/PRELOAD commands, a boundary scan test conforming to the
JTAG standard can be carried out. Table 23.3 shows the correspondence between SH7729R pins
and boundary scan register bits.
Rev. 5.0, 09/03, page 688 of 806