SH7729R Datasheet, PDF (203/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Section 6 X/Y Memory
6.1 Overview
The SH7729R has on-chip X-RAM and Y-RAM. It can be used by the CPU, DSP and DMAC to
store instructions or data.
6.1.1 Features
The X/Y memory features are listed in table 6.1.
Table 6.1 X/Y Memory Specifications
Parameter
Addressing
method
Ports
Size
Features
User selectable mapping mechanism
• Fixed mapping for mission-critical realtime applications (P2/Uxy area)
• Automatic mapping through TLB for easy to use (P0/P3/U0 area)
Three independent read/write ports
• 8-/16-/32-bit access from the CPU
• Maximum of two simultaneous 16-bit accesses, or 16/32-bit accesses,
from the DSP
• 8-/16-/32-bit access from the DMAC
8-kbyte RAM each for X and Y memory
Rev. 5.0, 09/03, page 157 of 806