SH7729R Datasheet, PDF (316/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

• Short refresh cycle control
 The overflow interrupt function of the refresh counter enables the refresh function
immediately after a self-refresh operation using low power-consumption DRAM
• The refresh counter can be used as an interval timer
 Outputs an interrupt request signal using the compare-match function
 Outputs an interrupt request signal when the refresh counter overflows
• Automatically disables the output of clock signals to anywhere but the refresh counter, except
during execution of external bus cycles
Rev. 5.0, 09/03, page 270 of 806