SH7729R Datasheet, PDF (35/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Figure 11.16
Figure 11.17
Figure 11.18
Figure 11.19
Figure 11.20
Figure 11.21
Figure 11.22
Figure 11.23
Figure 11.24
Figure 11.25
Figure 11.26
Figure 11.27
Figure 11.28
Figure 11.29
Figure 11.30
Figure 11.31
Figure 11.32
Figure 11.33
Figure 11.34
Figure 11.35
Figure 11.36
Figure 11.37
Figure 11.38
Figure 11.39
Figure 11.40
Figure 11.41
Figure 11.42
Figure 11.43
Figure 12.1
Figure 12.2
Figure 12.3
Figure 12.4
Figure 12.5
Figure 12.6
Figure 12.7
Figure 12.8
Figure 12.9
Basic Timing for Synchronous DRAM Single Read............................................ 328
Basic Timing for Synchronous DRAM Burst Write ............................................ 330
Basic Timing for Synchronous DRAM Single Write........................................... 332
Burst Read Timing (No Precharge) ...................................................................... 335
Burst Read Timing (Same Row Address) ............................................................ 336
Burst Read Timing (Different Row Addresses) ................................................... 337
Burst Write Timing (No Precharge) ..................................................................... 338
Burst Write Timing (Same Row Address) ........................................................... 339
Burst Write Timing (Different Row Addresses) .................................................. 340
Auto-Refresh Operation ....................................................................................... 341
Synchronous DRAM Auto-Refresh Timing......................................................... 342
Synchronous DRAM Self-Refresh Timing .......................................................... 344
Synchronous DRAM Mode Write Timing ........................................................... 346
Burst ROM Wait Access Timing ......................................................................... 348
Burst ROM Basic Access Timing ........................................................................ 349
Example of PCMCIA Interface ............................................................................ 351
Basic Timing for PCMCIA Memory Card Interface ............................................ 353
Wait Timing for PCMCIA Memory Card Interface ............................................. 354
Basic Timing for PCMCIA Memory Card Interface Burst Access ...................... 355
Wait Timing for PCMCIA Memory Card Interface Burst Access ....................... 356
PCMCIA Space Allocation .................................................................................. 357
Basic Timing for PCMCIA I/O Card Interface .................................................... 359
Wait Timing for PCMCIA I/O Card Interface ..................................................... 360
Dynamic Bus Sizing Timing for PCMCIA I/O Card Interface ............................ 361
Waits between Access Cycles .............................................................................. 363
Pull-Up Timing for Pins A25 to A0 ..................................................................... 364
Pull-Up Timing for Pins D31 to D0 (Read Cycle) ............................................... 365
Pull-Up Timing for Pins D31 to D0 (Write Cycle) .............................................. 365
Block Diagram of DMAC .................................................................................... 371
DMAC Transfer Flowchart .................................................................................. 388
Round-Robin Mode.............................................................................................. 392
Changes in Channel Priority in Round-Robin Mode............................................ 393
Operation of Direct Address Mode in Dual Address Mode ................................. 395
Example of DMA Transfer Timing in the Direct Address Mode in Dual Mode
(Transfer Source: Ordinary Memory, Transfer Destination: Ordinary Memory). 396
Example of DMA Transfer Timing in the Direct Address Mode in Dual Mode
(16-byte Transfer, Transfer Source: Ordinary Memory,
Transfer Destination: Ordinary Memory)............................................................. 397
Example of DMA Transfer Timing in the Direct Address Mode in Dual Mode
(16-byte Transfer, Transfer Source: Synchronous DRAM,
Transfer Destination: Ordinary Memory)............................................................. 397
Indirect Address Operation in Dual Address Mode (When External Memory
Space has a 16-Bit Width).................................................................................... 399
Rev. 5.0, 09/03, page xxxv of xlvi