SH7729R Datasheet, PDF (802/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

24.3.11 Delay Time Variation Due to Load Capacitance
A graph (reference data) of the variation in delay time when a load capacitance greater than that
stipulated (30 pF) is connected to the SH7729R’s pins is shown below. The graph shown in figure
24.60 should be taken into consideration in the design process if the stipulated capacitance is
exceeded in connecting an external device.
If the connected load capacitance exceeds the range shown in figure 24.60, the graph will not be a
straight line.
+3
+2
+1
+0
+0
+10
+20
+30
+40
+50
Load Capacitance [pF]
Figure 24.60 Load Capacitance vs. Delay Time
Rev. 5.0, 09/03, page 756 of 806