SH7729R Datasheet, PDF (521/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

SCPT[0]/RxD0
SCI
Serial
receive
data
Legend
PDRR: PDR read
PDRR^*
Internal data bus
Note: * When reading the RxD0 pin, set the RE bit in SCSCR to 1.
Figure 15.4 SCPT[0]/RxD0 Pin
15.1.3 Pin Configuration
The SCI has the serial pins summarized in table 15.1.
Table 15.1 SCI Pins
Pin Name
Abbreviation I/O
Function
Serial clock pin
SCK0
I/O
Clock I/O
Receive data pin
RxD0
Input
Receive data input
Transmit data pin
TxD0
Output Transmit data output
Note: These pins are made to function as serial pins by performing SCI operation settings with the
TE, RE, CKEI, and CKEO bits in SCSCR and the C/A bit in SCSMR. Break state
transmission and detection can be performed by means of the SCI’s SCSPTR register.
Rev. 5.0, 09/03, page 475 of 806