SH7729R Datasheet, PDF (68/855 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

39 32 31
0
A0G
A0
A1G
A1
M0
M1
X0
X1
Y0
Y1
DSR
RS
RE
MOD
(d) DSP mode register configuration (DSP = 1)
Figure 2.2 Register Configuration in Each Processing Mode (2)
Register values after a reset are shown in table 2.1.
Table 2.1 Initial Register Values
Type
General registers
Control registers
Registers
R0 to R15
SR
GBR, SSR, SPC
VBR
RS, RE
MOD
System registers
MACH, MACL, PR
PC
DSP registers
A0, A0G, A1, A1G, M0, M1,
X0, X1, Y0, Y1
DSR
Note: * Initialized by a power-on or manual reset.
Initial Value^*
Undefined
MD bit = 1, RB bit = 1, BL bit = 1, I3
to I0 = 1111 (H'F), reserved bits = 0,
others undefined
Undefined
H'00000000
Undefined
Undefined
Undefined
H'A0000000
Undefined
H'00000000
Rev. 5.0, 09/03, page 22 of 806