SH7080 Datasheet, PDF (98/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 2 CPU
Type
Arithmetic
operation
instructions
Logic
operation
instructions
Shift
instructions
Kinds of
Instruction
21
6
10
Op Code
MULS
MULU
NEG
NEGC
SUB
SUBC
SUBV
AND
NOT
OR
TAS
TST
XOR
ROTL
ROTR
ROTCL
ROTCR
SHAL
SHAR
SHLL
SHLLn
SHLR
SHLRn
Function
Signed multiplication
Unsigned multiplication
Sign inversion
Sign inversion with borrow
Binary subtraction
Binary subtraction with carry
Binary subtraction with underflow
Logical AND
Bit inversion
Logical OR
Memory test and bit setting
T bit setting for logical AND
Exclusive logical OR
1-bit left shift
1-bit right shift
1-bit left shift with T bit
1-bit right shift with T bit
Arithmetic 1-bit left shift
Arithmetic 1-bit right shift
Logical 1-bit left shift
Logical n-bit left shift
Logical 1-bit right shift
Logical n-bit right shift
Number of
Instructions
33
14
14
Rev. 3.00 May 17, 2007 Page 40 of 1582
REJ09B0181-0300