SH7080 Datasheet, PDF (85/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 2 CPU
2.2.3 System Registers
There are four 32-bit system registers, designated two multiply and accumulate registers (MACH
and MACL), a procedure register (PR), and program counter (PC).
• Multiply and accumulate registers (MACH and MACL)
This register stores the results of multiplication and multiply-and-accumulate operation.
• Procedure register (PR)
This register stores the return-destination address from subroutine procedures.
• Program counter (PC)
The PC indicates the point which is four bytes (two instructions) after the current execution
instruction.
2.2.4 Initial Values of Registers
Table 2.1 lists the initial values of registers after a reset.
Table 2.1 Initial Values of Registers
Type of register
General register
Control register
System register
Register
R0 to R14
R15 (SP)
SR
GBR
VBR
MACH, MACL, PR
PC
Default
Undefined
SP value set in the exception handling vector table
I3 to I0: 1111 (H'F)
Reserved bits: 0
Other bits: Undefined
Undefined
H'00000000
Undefined
PC value set in the exception handling vector table
Rev. 3.00 May 17, 2007 Page 27 of 1582
REJ09B0181-0300