SH7080 Datasheet, PDF (1393/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 26 Power-Down Modes
26.3.5 Standby Control Register 5 (STBCR5)
STBCR5 is an 8-bit readable/writable register that controls the operation of modules in power-
down mode.
Bit: 7
6
5
4
3
2
1
0
-
-
-
-
-
-
MSTP MSTP
25
24
Initial value: 0
0
0
0
0
0
1
1
R/W: R
R
R
R
R
R R/W R/W
Bit
7 to 2
1
0
Bit Name

Initial
Value
All 0
MSTP25 1
MSTP24 1
R/W Description
R Reserved
These bits are always read as 0. The write value should
always be 0.
R/W Module Stop Bit 25
When this bit is set to 1, the supply of the clock to the
AUD is halted.
0: AUD operates
1: Clock supply to AUD halted
R/W Module Stop Bit 24
When this bit is set to 1, the supply of the clock to the
UBC is halted.
0: UBC operates
1: Clock supply to UBC halted
Rev. 3.00 May 17, 2007 Page 1335 of 1582
REJ09B0181-0300