SH7080 Datasheet, PDF (1546/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Appendix
[Legend]
I:
Input
O: Output
H: High-level output
L:
Low-level output
Z:
High-impedance
K:
Input pins become high-impedance, and output pins retain their state.
Notes: 1. Output pins become high-impedance when the HIZ bit in standby control register 6
(STBCR6) is set to 1.
2. Becomes output when the HIZCNT bit in the common control register (CMNCR) is set
to 1.
3. Becomes output when the HIZMEM bit in the common control register (CMNCR) is set
to 1.
4. Becomes high-impedance when the MZIZDH bit in the high-current port control register
(HCPCR) is cleared to 0.
5. Becomes high-impedance when the MZIZDL bit in the high-current port control register
(HCPCR) is cleared to 0.
6. Becomes high-impedance when the MZIZEH bit in the high-current port control register
(HCPCR) is cleared to 0.
7. Becomes high-impedance when the MZIZEL bit in the high-current port control register
(HCPCR) is cleared to 0.
8. Becomes input during a power-on reset. Pull-up to prevent erroneous operation. Pull-
down with a resistance of at least 1 MΩ as required.
9. Pulled-up inside the LSI when there is no input.
Rev. 3.00 May 17, 2007 Page 1488 of 1582
REJ09B0181-0300