SH7080 Datasheet, PDF (672/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
MPφ
Input capture
signal
Counter clear
signal
TCNT
N
H'0000
TGR
N
Figure 11.102 Counter Clear Timing (Input Capture) (Channels 0 to 5)
Buffer Operation Timing: Figures 11.103 to 11.105 show the timing in buffer operation.
MPφ
TCNT
n
n+1
Compare
match buffer
signal
TGRA,
TGRB
n
N
TGRC,
N
TGRD
Figure 11.103 Buffer Operation Timing (Compare Match)
MPφ
Input capture
signal
TCNT
N
N+1
TGRA,
TGRB
n
TGRC,
TGRD
N
N+1
n
N
Figure 11.104 Buffer Operation Timing (Input Capture)
Rev. 3.00 May 17, 2007 Page 614 of 1582
REJ09B0181-0300