SH7080 Datasheet, PDF (286/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Bus State Controller (BSC)
Table 9.7 Address Map: SH7084 (256-Kbyte Flash Memory Version) in On-Chip ROM-
Disabled Mode
Address
H'00000000 to
H'03FFFFFF
Area
CS0 space
H'04000000 to CS1 space
H'07FFFFFF
H'08000000 to CS2 space
H'0BFFFFFF
H'0C000000 to CS3 space
H'0FFFFFFF
H'10000000 to CS4 space
H'13FFFFFF
H'14000000 to CS5 space
H'17FFFFFF
H'18000000 to CS6 space
H'1BFFFFFF
H'1C000000 to CS7 space
H'1FFFFFFF
H'20000000 to Reserved
H'FFF7FFFF
H'FFF80000 to SDRAM mode setting
H'FFF9FFFF space
H'FFFA0000 to Reserved
H'FFFF7FFF
Memory Type
Normal space
SRAM with byte selection
Burst ROM (asynchronous)
Burst ROM (synchronous)
Normal space
SRAM with byte selection
Normal space
SRAM with byte selection
SDRAM
Normal space
SRAM with byte selection
SDRAM
Normal space
SRAM with byte selection
Burst ROM (asynchronous)
Normal space
SRAM with byte selection
MPX-I/O
Normal space
SRAM with byte selection
Normal space
SRAM with byte selection
Capacity
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
Bus
Width
8 or 16
bits*¹
8 or 16
bits*²
8 or 16
bits*²
8 or 16
bits*²
8 or 16
bits*²
8 or 16
bits*²
8 or 16
bits*²
8 or 16
bits*²
Rev. 3.00 May 17, 2007 Page 228 of 1582
REJ09B0181-0300