SH7080 Datasheet, PDF (1615/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Item
18.3.3 I²C Bus Mode Register
(ICMR)
Page Revision (See Manual for Details)
911 Amended
Bit Bit Name Description
2 to 0 BC[2:0] Bit Counter 2 to 0
…. The value returns to 000 at the end of a data
transfer, including the acknowledge bit. These
bits are automatically set to 111 after a stop
condition is detected.
18.8.3 Issuance of a Start
Condition and Stop Condition in
Sequence to 18.8.5 Reading
ICDRR in Master Receive Mode
Table 19.3 Channel Select List
19.3.4 A/D Trigger Select
Registers_0 and _1 (ADTSR_0
and ADTSR_1)
19.4.2 Continuous Scan Mode
943, Added
944
954,
955
956
962
Changed
Amended
In particular, the four channels in A/D module 0 and A/D
module 1 are divided into two groups (group 0 and
group 1) and the A/D trigger can be specified for each
group independently in 2-channel scan mode.
Deleted
In 2-channel scan mode, since the channels are divided into
group 0 and group 1, even though group 0 is operating in
continuous scan mode, the contents of the A/D data registers
for group 1 are retained. Similarly, even though group 1 is
operating in continuous scan mode, the contents of the A/D
data registers for group 0 are retained. Note that a group 1
conversion request issued during group 0 A/D conversion is
ignored. Specify different trigger sources for the group 0 and
group 1 conversion requests so that a group 0 conversion
request is not generated simultaneously with a group 1
conversion request.
In 2-channel scan mode, when A/D conversion is to be started
by software, selection of group 0 or group 1 is determined by
the CH2 to CH0 bits in ADCSR_0 to ADCSR_2. When A/D
conversion is to be started by triggering, regardless of the
setting of the CH2 to CH0 bits in ADCSR_0 to ADCSR_2, A/D
conversion for group 0 is started by the trigger source set by
the TRG0S3 to TRG0S0 and TRG1S3 to TRG1S0 bits in
ADTSR, and A/D conversion for group 1 is started by the
trigger source set by the TRG01S3 to TRG01S0 and TRG11S3
to TRG11S0 bits in ADTSR.
Rev. 3.00 May 17, 2007 Page 1557 of 1582
REJ09B0181-0300