SH7080 Datasheet, PDF (1390/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 26 Power-Down Modes
Bit
3
2 to 0
Bit Name
MSTP3
Initial
Value
1

All 0
R/W Description
R/W Module Stop Bit 3
When this bit is set to 1, the supply of the clock to the
DMAC is halted.
0: DMAC operates
1: Clock supply to the DMAC halted
R Reserved
These bits are always read as 0. The write value should
always be 0.
26.3.3 Standby Control Register 3 (STBCR3)
STBCR3 is an 8-bit readable/writable register that controls the operation of modules in power-
down mode.
Bit: 7
6
5
4
3
2
1
0
MSTP MSTP MSTP MSTP MSTP MSTP
15
14
13
12
11
10
-
-
Initial value: 1
1
1
1
1
1
1
1
R/W: R/W R/W R/W R/W R/W R/W R R
Initial
Bit
Bit Name Value R/W Description
7
MSTP15 1
R/W Module Stop Bit 15
When this bit is set to 1, the supply of the clock to the
I²C2 is halted.
0: I²C2 operates
1: Clock supply to I²C2 halted
6
MSTP14 1
R/W Module Stop Bit 14
When this bit is set to 1, the supply of the clock to the
SCIF is halted.
0: SCIF operates
1: Clock supply to SCIF halted
Rev. 3.00 May 17, 2007 Page 1332 of 1582
REJ09B0181-0300