SH7080 Datasheet, PDF (175/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Interrupt Controller (INTC)
Initial
Bit
Bit Name Value
R/W Description
2
IRQ2F
0
R/W Indicates the status of an IRQ2 interrupt request.
• When level detection mode is selected
0: An IRQ2 interrupt has not been detected
[Clearing condition]
Driving pin IRQ2 high
1: An IRQ2 interrupt has been detected
[Setting condition]
Driving pin IRQ2 low
• When edge detection mode is selected
0: An IRQ2 interrupt has not been detected
[Clearing conditions]
 Writing 0 after reading IRQ2F = 1
 Accepting an IRQ2 interrupt
1: An IRQ2 interrupt request has been detected
[Setting condition]
Detecting the specified edge of pin IRQ2
1
IRQ1F
0
R/W Indicates the status of an IRQ1 interrupt request.
• When level detection mode is selected
0: An IRQ1 interrupt has not been detected
[Clearing condition]
Driving pin IRQ1 high
1: An IRQ1 interrupt has been detected
[Setting condition]
Driving pin IRQ1 low
• When edge detection mode is selected
0: An IRQ1 interrupt has not been detected
[Clearing conditions]
 Writing 0 after reading IRQ1F = 1
 Accepting an IRQ1 interrupt
1: An IRQ1 interrupt request has been detected
[Setting condition]
Detecting the specified edge of pin IRQ1
Rev. 3.00 May 17, 2007 Page 117 of 1582
REJ09B0181-0300