English
Language : 

SH7080 Datasheet, PDF (974/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family
Section 18 I2C Bus Interface 2 (I2C2)
Initial
Bit
Bit Name Value R/W Description
2
AL/OVE
0
R/W Arbitration Lost Flag/Overrun Error Flag
This flag indicates that arbitration was lost in master
mode with the I2C bus format and that the final bit has
been received while RDRF = 1 with the clock
synchronous format.
When two or more master devices attempt to seize the
bus at nearly the same time, if the I2C bus interface 2
detects data differing from the data it sent, it sets AL to
1 to indicate that the bus has been occupied by another
master.
[Setting conditions]
• If the internal SDA and SDA pin disagree at the rise
of SCL in master transmit mode
• When the SDA pin outputs high in master mode
while a start condition is detected
• When the final bit is received with the clock
synchronous format while RDRF = 1
[Clearing condition]
• When 0 is written to AL/OVE after reading AL/OVE
=1
1
AAS
0
R/W Slave Address Recognition Flag
In slave receive mode, this flag is set to 1 if the first
frame following a start condition matches bits SVA6 to
SVA0 in SAR.
[Setting conditions]
• When the slave address is detected in slave receive
mode
• When the general call address is detected in slave
receive mode.
[Clearing condition]
• When 0 is written to AAS after reading AAS=1
Rev. 3.00 May 17, 2007 Page 916 of 1582
REJ09B0181-0300