SH7080 Datasheet, PDF (407/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Bus State Controller (BSC)
Basic Timing for I/O Card Interface: Figures 9.41 and 9.42 show the basic timings for the
PCMCIA I/O card interface.
The I/O card and IC memory card interfaces are switched by an address to be accessed. When area
5 is specified as the PCMCIA and both bits SA1 and SA0 in CS5WCR are set to 1, I/O card areas
are allocated to address ranges from H'16000000 to H'17FFFFFF and from H'14000000 to
H'15FFFFFF. When area 6 is specified as the PCMCIA and both bits SA1 and SA0 in CS6WCR
are set to 1, I/O card areas allocated to address ranges from H'1A000000 to H'1BFFFFFF and
from H'18000000 to H'19FFFFFF.
In addition, note that this LSI does not support little endian and the IOIS16 signal must be fixed
low.
CK
A25 to A0
CExx
Tpci1
Tpci1w
Tpci1w
Tpci1w
Tpci2
RDWR
Read
ICIORD
D15 to D0
Write
ICIOWR
D15 to D0
BS
Figure 9.41 Basic Timing for PCMCIA I/O Card Interface
Rev. 3.00 May 17, 2007 Page 349 of 1582
REJ09B0181-0300