SH7080 Datasheet, PDF (1274/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 23 Flash Memory
 User branching
Programming is performed in 128-byte units. Each round of programming consists of
application of the programming pulse, reading for verification, and several other steps. Erasing
is performed in block units and each round of erasing consists of several steps. A user-
processing routine can be executed between each round of erasing, and making the setting for
this is called the addition of a user branch.
• Using on-chip RAM to emulate flash memory
By laying on-chip RAM over part of the flash memory, flash-memory programming can be
emulated in real time.
• Protection modes
There are two modes of protection: software protection is applied by register settings and
hardware protection is applied by the level on the FWE pin. Protection of the flash memory
from programming or erasure can be selected.
When an abnormal state is detected, such as runaway execution of programming/erasing, the
protection modes initiate the transition to the error protection state and suspend
programming/erasing processing.
• Programming/erasing time
The time taken to program 128 bytes of flash memory in a single round is t_P ms (typ.), which is
equivalent to t_P/128 ms per byte. The erasing time is t_Es (typ.) per block.
• Number of programming operations
The flash memory can be programmed up to N_WEC times.
• Operating frequency for programming/erasing
The operating frequency for programming/erasing is a maximum of 40 MHz (Pφ).
Rev. 3.00 May 17, 2007 Page 1216 of 1582
REJ09B0181-0300