SH7080 Datasheet, PDF (10/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

3.3.2 Mode 1 (MCU Extension Mode 1) ......................................................................... 57
3.3.3 Mode 2 (MCU Extension Mode 2) ......................................................................... 57
3.3.4 Mode 3 (Single Chip Mode) ................................................................................... 57
3.4 Address Map ........................................................................................................................ 58
3.5 Initial State in This LSI........................................................................................................ 65
3.6 Note on Changing Operating Mode ..................................................................................... 65
Section 4 Clock Pulse Generator (CPG) ............................................................. 67
4.1 Features................................................................................................................................ 67
4.2 Input/Output Pins................................................................................................................. 71
4.3 Clock Operating Mode......................................................................................................... 72
4.4 Register Descriptions........................................................................................................... 77
4.4.1 Frequency Control Register (FRQCR) ................................................................... 77
4.4.2 Oscillation Stop Detection Control Register (OSCCR) .......................................... 80
4.5 Changing Frequency ............................................................................................................ 81
4.6 Oscillator.............................................................................................................................. 82
4.6.1 Connecting Crystal Resonator ................................................................................ 82
4.6.2 External Clock Input Method ................................................................................. 83
4.7 Function for Detecting Oscillator Stop ................................................................................ 84
4.8 Usage Notes ......................................................................................................................... 85
4.8.1 Note on Crystal Resonator...................................................................................... 85
4.8.2 Notes on Board Design ........................................................................................... 85
Section 5 Exception Handling ............................................................................. 87
5.1 Overview.............................................................................................................................. 87
5.1.1 Types of Exception Handling and Priority ............................................................. 87
5.1.2 Exception Handling Operations.............................................................................. 88
5.1.3 Exception Handling Vector Table .......................................................................... 89
5.2 Resets................................................................................................................................... 91
5.2.1 Types of Resets....................................................................................................... 91
5.2.2 Power-On Reset ...................................................................................................... 91
5.2.3 Manual Reset .......................................................................................................... 92
5.3 Address Errors ..................................................................................................................... 93
5.3.1 Address Error Sources ............................................................................................ 93
5.3.2 Address Error Exception Source............................................................................. 94
5.4 Interrupts.............................................................................................................................. 95
5.4.1 Interrupt Sources..................................................................................................... 95
5.4.2 Interrupt Priority ..................................................................................................... 96
5.4.3 Interrupt Exception Handling ................................................................................. 96
5.5 Exceptions Triggered by Instructions .................................................................................. 97
Rev. 3.00 May 17, 2007 Page x of lviii