SH7080 Datasheet, PDF (81/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 2 CPU
2.1 Features
• General registers: 32-bit register × 16
• Basic instructions: 62
• Addressing modes: 11
Register direct (Rn)
Register indirect (@Rn)
Post-increment register indirect (@Rn+)
Pre-decrement register indirect (@-Rn)
Register indirect with displacement (@disp:4, Rn)
Index register indirect (@R0, Rn)
GBR indirect with displacement (@disp:8, GBR)
Index GBR indirect (@R0, GBR)
PC relative with displacement (@disp:8, PC)
PC relative (disp:8/disp:12/Rn)
Immediate (#imm:8)
Section 2 CPU
CPUS200C_000020020700
Rev. 3.00 May 17, 2007 Page 23 of 1582
REJ09B0181-0300