SH7080 Datasheet, PDF (796/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 15 Serial Communication Interface (SCI)
Initial
Bit
Bit Name value R/W Description
3
PER
0
R/(W)* Parity Error
Indicates that a parity error occurred during data
reception in asynchronous mode, causing abnormal
termination.
0: Indicates that reception is in progress or was
completed successfully*¹
[Clearing conditions]
• By a power-on reset or in standby mode
• When 0 is written to PER after reading PER = 1
1: Indicates that a parity error occurred during
reception*²
[Setting condition]
• When the number of 1s in the received data and
parity does not match the even or odd parity
specified by the O/E bit in the serial mode register
(SCSMR).
Notes: 1. The PER flag is not affected and retains
its previous value when the RE bit in
SCSCR is cleared to 0.
2. If a parity error occurs, the receive data is
transferred to SCRDR but the RDRF flag
is not set. Subsequent serial reception
cannot be continued while the PER flag is
set to 1.
Rev. 3.00 May 17, 2007 Page 738 of 1582
REJ09B0181-0300