SH7080 Datasheet, PDF (771/1644 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 14 Watchdog Timer (WDT)
Section 14 Watchdog Timer (WDT)
This LSI includes the watchdog timer (WDT).
This LSI can be reset by the overflow of the counter when the value of the counter has not been
updated because of a system runaway.
The watchdog timer (WDT) is a single-channel timer that uses a peripheral clock as an input and
counts the clock settling time when revoking software standby mode. It can also be used as an
interval timer.
14.1 Features
• Can be used to ensure the clock settling time: Use the WDT to revoke software standby mode.
• Can switch between watchdog timer mode and interval timer mode.
• Generates internal resets in watchdog timer mode: Internal resets occur after counter overflow.
• An interrupt is generated in interval timer mode
An interval timer interrupt is generated when the counter overflows.
• Choice of eight counter input clocks
Eight clocks (×1 to ×1/4096) that are obtained by dividing the peripheral clock can be chosen.
• Choice of two resets
Power-on reset and manual reset are available.
Figure 14.1 shows a block diagram of the WDT.
WDTS300B_000020030200
Rev. 3.00 May 17, 2007 Page 713 of 1582
REJ09B0181-0300